Providing ASIC Solutions for Motor Control and Motor Spin
We can provide you:
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Great training with fun learning environment.
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Great potential for career.
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Competitive compensation.
Joining an early stage startup is the choice for those who dream big
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Show your potential, then sky is the only limit.
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Have the feeling of being in a family.
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Get the job done while having fun.
Following job openings are available now:
Position 1: Analog/Mixed-signal Circuit Design Engineer(Full-time)
Location: Shanghai
Responsibilities
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Research and development of state-of-the-art analog and mixed-signal circuit systems for automotive, consumer and industrial markets.
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Participate in analog and mixed-signal IP architecture roadmap development.
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Participate in all aspects of design cycle, including architecture development, transistor level design, interaction with digital system and software teams, layout supervision, lab characterization, production, marketing and customer support.
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Develop products to meet the performance targets in timely fashion.
Requirements
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MSEE/PhD with minimum 3 years of professional experience in analog & mixed signal IC design. A proven record of releasing design to market is preferred.
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Strong knowledge of analog circuit design, parasitic and noise analysis, CMOS device physics and fabrication.
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Understanding of layout flow and verification checks such as DRC, ERC, LVS.
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Basic knowledge of key analog blocks and systems, such as (but not limited to) bandgap and biasing circuitry, ADC/DAC, LDO, charge pump, PLL/DLL, power converters.
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Ability to take ownership of the project, work independently with minimal supervision, provide attention to details, resulting in timely and reliable delivery.
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Clear communicator and team player.
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Knowledge on related CAD tool (i.e. PDK installation, PCell design, Skill script) is a plus.
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Experience with Verilog/Veriloga/VerilogAMS modeling is a plus.
Focus Skills and Experience 1
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Experience in high-resolution ADC design and production, preferably 16-bit and higher
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High-speed pipeline or SAR ADC
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High-resolution sigma-delta ADC
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Basic knowledge of signal processing concepts
Focus Skills and Experience 2
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Experience in high-voltage design, such as gate driver
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Understanding of high-voltage silicon manufacturing technology
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Basic understanding of power conversion design, such as DC/DC and AC/DC converters
Position 2: Firmware Engineer (Full-time)
Location: Shanghai / Shenzhen
Responsibilities
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SDK delivery, working with silicon team closely
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Creating and maintaining collaterals and content for products
Requirements
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Self-driven, think out of the box
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Strong knowledge of C/C++ is essential
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Good knowledge of debugging and problem solving complex embedded systems
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Good knowledge of ARM is a plus
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Familiar with PCB design and layout
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Strong communication skills
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Willing to travel
Position 3: Motor Control Application Engineer (Full-time)
Location: Shenzhen (Will be the first employee inShenzhen office)
Responsibilities
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Support the regional key selected accounts, especially with regard to system level architecture and early engagement design-in activities
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Working with R&D team to understand system specifications and translate customers’ needs into system level solutions
Requirements
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Self-driven, think out of the box
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Strong knowledge of C/C++ is essential
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Good knowledge of debugging and problem solving complex embedded systems
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Good knowledge of ARM is a plus
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Familiar with PCB design and layout
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Strong communication skills
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Willing to travel
Position 4: Verification Engineer (Full-time)
Location: Shanghai
Responsibilities
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Create the verification plan for full chip/block level with a high functional coverage by fully understanding the design specification.
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Full chip/block level verification with constrained-random stimulus/coverage model using System verilog and UVM methodology.
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Responsible for post simulation and debug.
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Provide the test vectors for validation engineer.
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Using firmware code(C/C++) to verify the ARM based SoC chip.
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Help to build up the FGPA verification environment.
Requirements
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Good knowledge of UVM methodology.
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Familiar with the EDA tools of design and verification.
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Deep understanding of ASIC design and verification flow.
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Good knowledge of SoC architecture.
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Experience of C/C++ programming.
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Must be a good team player and eager to success.
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Strong communication, analytical skills.
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BSEE/CS or MSEE/CS degree.
Position 5: SoC ASIC Design Engineer (Full-time)
Location: Shanghai
Responsibilities
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SoC level implementation.
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UPF Synthesis with Synopsys DC or DCT/G flows.
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RTL2Gate and Gate2Gate formal check with LEC and/or formality tools.
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Working with back-end team to timing closure in Primetime-SI on multi-corners and multi-modes.
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Ability to build or improve the EDA-methodology-flow with perl, tcl or shell.
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Support on full chip/block level verification with constrained-random stimulus/coverage model using System verilog and UVM methodology.
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Support on DFT.
Requirements
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BSEE degree or above.
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Strong understanding of synthesis flow using DC/DCT/DCG - for a low power (UPF) and high speed complex SoC.
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Hands on experience with formal verification tools such as LEC and/or formality.
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Must have the CTS conceptions in ICC at P&R stage.
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Strong STA skills. Must have thorough knowledge on closing timing at unit and top level.
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Proficient in Perl, Tcl and Shell programming.
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Clear communicator and team player.
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Knowledge on UVM is a plus.
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Experience in DFT will be plus.
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Experience with motor control or Ethernet is a plus.
Please send your resume to hr@spintrol.com